Paper-Conference

Fault simulation acceleration based on ARM multi-core CPU architecture

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Hardsatgen: Understanding the difficulty of hard sat formula generation and a strong structure-hardness-aware baseline

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Satformer: transformer-based unsat core learning

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Accelerate sat-based atpg via preprocessing and new conflict management heuristics

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Branch ranking for efficient mixed-integer programming via offline ranking-based policy learning

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Neural fault analysis for sat-based atpg

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Learning to optimize industry-scale dynamic pickup and delivery problems

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